The present invention relates to digital computer systems, and more particularly, to built-in self-test systems.
Integrated circuits are increasing in complexity to meet the demand of new, sophisticated applications. For example, it has become more common in recent years to include specialized processing blocks in configurable devices. Such types of specialized processing blocks—commonly referred to as logic blocks or cores—can include a concentration of circuitry (e.g., digital signal processing blocks or DSP blocks in signal processing applications) that is partly or fully hardwired to perform one or more specific tasks, such as a logical or a mathematical operation.
To ensure the satisfactory operation of a device, several test-related activities can be pursued. For example, manufacturing tests ensure device quality, system debug tests support system bring-up and ensure that a chip functions properly after the chip has been integrated into its surrounding system (e.g., board), and field tests guarantee system reliability. These activities can make use of internal test support circuitry (e.g., on-chip design-for-test infrastructure), which needs to be defined in early design stages of the device.
Internal test support circuitry is sometimes referred to as built-in self-test (BIST) circuitry. One type of BIST circuitry, the Logic Built-In Self-Test (LBIST), originally designed for in-field and system tests, has been recently applied in manufacturing tests, where it usually complements deterministic schemes based on test pattern compression. The LBIST Design-for-Test (DfT) infrastructure is selected during chip design and is configured during post-silicon validation and yield learning to debug and diagnose a wide range of test issues.